Put it together
A real MMU looks in the TLB (a tiny cache of recent translations) first; on a miss it walks the page table; if the page isn't in memory, a page fault loads it — evicting the least recently used page when memory is full. Build the whole pipeline and measure it.
The access pipeline
Each access goes through the same steps. Split the address into page and offset. If the TLB has the page, use its frame — the fast path. Otherwise consult the page table: if the page is present, use its frame and add it to the TLB. If it isn't, take a page fault: find a free frame or evict the least recently used page, load the page, update the table and the TLB.
- TLB hit → done in one step.
- TLB miss, page present → page-table walk, then cache in the TLB.
- Page fault → load the page, maybe evicting one first.
- Every access, hit or miss, updates the LRU order.
Implement the fast path last. Get the page-table and fault logic right first, then add the TLB and check the stats change.